1. Field of the Invention
The present invention relates to a method and apparatus for forming interconnects (wiring), and more particularly to a method and apparatus for forming interconnects (wiring) on a substrate such as a semiconductor wafer by filling conductive materials such as copper (Cu) in fine recesses formed in a surface of the substrate in a predetermined interconnect pattern.
2. Description of the Related Art
Generally, aluminum or aluminum alloys have been used as a material for forming interconnects (wiring) for a semiconductor. However, in recent years, there has been a growing tendency to replace aluminum with copper for the following reasons: Copper has excessively low electric resistivity of 1.72 xcexcxcexa9 cm which is about 40% lower than that of aluminum, and hence copper has the advantage of reduced RC delay phenomenon and has higher resistance against electromigration damage than aluminum. For example, even if current density increases up to 1xc3x97106 or 1M A/cm2 or more due to a drastic reduction in a cross-sectional area of a line, there is little probability that electromigration occurs in the interior of the line. Further, copper is more suitable for dual damascene process than aluminum, and has a high capability that a complicated and fine structure of multi-level interconnections can be manufactured at a low cost.
In order to form fine wiring or interconnects with copper, since practical dry etching process of copper has not been established, it is inevitable to employ the so-called damascene process in which copper is filled into patterned trenches and vias preformed in insulating layers of a semiconductor substrate.
As a means for filling copper into the minute trenches or vias by the damascene process, there are various ways including CVD, sputter deposition (sputtering), electroplating, and the like. Among these processes, the sputter deposition which combines film deposition by sputtering and heating has the advantage of high deposition rate with excellent film quality. In addition, existing sputtering apparatuses and technology for depositing aluminum are still usable.
In the film deposition by sputtering (sputter deposition), a substrate and a target are disposed in confrontation with each other in a chamber, a high voltage is applied between the substrate and the target, and a sputtering gas is introduced into the chamber. Thus, high-energy particles such as ions of sputtering gas which have been ionized and accelerated collide with the target to cause particles of the target material to be sputtered and emitted from the target, and the emitted particles of the target material are deposited over the substrate to thus fill the target material into the minute trenches or vias for thereby forming patterned interconnects.
However, this sputtering process is problematic for its poor step coverage characteristic, i.e., capability of covering portions having difference in level, is low, because sputtered atoms travel straight. FIG. 10 is a schematic view showing the state of an overhang of copper formed at an inlet portion of a fine recess after copper as a metalizing material is deposited to fill the fine recess for preparing interconnects.
As shown in FIG. 10, when copper as a wiring material is filled by the sputter deposition process in a fine recess 102a formed in a substrate 102, copper atoms emitted from the target travel straight and are deposited in a concentrated manner at the inlet portion of the recess 102a, thus forming the overhang portion (projecting portion) A. If the overhang portion A is formed at the inlet portion of the recess 102a, then the inlet portion of the recess 102a is blockaded by copper 104 before copper atoms are sufficiently deposited in the interior of the recess 102a. Therefore, after this blockade occurs, it prevents copper from being filled into the interior of the recess 102a, and the coating or filling process cannot help finishing with a void-like defect B left. Thus, it is generally considered that because of presence of the overhang portion A, the minimum size capable of coating or filling copper by the sputter deposition is in the range of 0.13 to 0.15 xcexcm.
When interconnects are formed by filling copper or copper alloy as a conductive material in the recess by the sputter deposition process, it has heretofore been customary to use metallic materials having a desired crystal grain size, mechanical properties and surface condition by applying a suitable plastic working, heat treatment and machining.
In order to properly machine the target into a desired configuration, as described above, it is necessary to adjust hardness of the metallic materials by suitable heat treatment, particularly, the final annealing. FIG. 11 shows the relationship between annealing temperature of copper (oxygen free copper A, electrolytic copper B, and phosphorus deoxidized copper C) and Vickers hardness. As is apparent from FIG. 11, as the annealing temperature rises, the Vickers hardness decreases drastically, and when the annealing temperature rises from 400xc2x0 C. to 800xc2x0 C., the Vickers hardness gradually decreases by about 10. Thus, in order to sufficiently lower the hardness of the target, the annealing should be carried out at a temperature of 600xc2x0 C. or higher.
FIG. 12 shows the relationship between annealing temperature of pure copper with 5% or less compressive work strain and its crystal grain size obtained at such annealing temperature. As shown in FIG. 12, annealing at a temperature of 600xc2x0 C. makes a fairly great copper grain size of approximately 300 xcexcm, for example, with lowered hardness. Difference in target grain size is assumed to create varied deposition result. Specifically, it is considered that if the target crystal grain size exceeds the allowable limit, sputtered copper atoms travel in random directions, remarkably impairing perpendicular travel, due to various crystal orientation of the surface of the target. The traveling direction of copper atoms which have been sputtered, i.e., copper atoms emitted from the target due to collision of high-energy particles with the target, varies with the crystal orientation of the target. Therefore, if the target and the substrate are parallelly faced with each other, filling characteristic of copper atoms into the minute recesses formed perpendicularly to the surface of the substrate is greatly impaired, because a number of atoms travel in oblique directions.
FIG. 13 shows the results of filling copper into a minute via formed in a surface of a semiconductor substrate using a copper target of large grains whose diameter is approximately 200 xcexcm, obtained by annealing thereof at a high temperature described above. As shown in FIG. 13, copper 114 is not deposited in the interior of a via 112 having a diameter of approximately 0.15 xcexcm, formed in the surface of the semiconductor substrate 110, except for an inlet portion of the via 112, and the upper part of the via 112 is blockaded while leaving a void 116. Therefore, it is difficult or impossible to form copper wiring or interconnects having sufficient current capacity. This is presumably caused by oblique traveling characteristic of copper atoms which have been sputtered.
Conventionally, in the semiconductor device having a wiring circuit with a width of 0.13 xcexcm or less, it has been generally understood that the optimum process consists of formation of the seed layer by sputter deposition, followed by copper electroplating metalization. The primary purpose of the seed layer is that the seed layer serves as an electrolytic cathode for supplying a sufficient amount of current to reduce metal ions in the plating liquid and to precipitate and deposit solid metal on the substrate. This is because as long as the seed layer remains satisfactory, there exists a high possibility of simultaneously realizing three factors; excellent filling property, high conductivity, and electromigration resistance with electroplating. Therefore, in order to perform electroplating, it is indispensable to form a thin seed layer of conductive material uniformly and continuously over the entire inner surface of the recess. For example, when fine wiring of copper is to be formed by the damascene process, a thin seed layer of the same material as wiring material, i.e. copper is formed prior to electroplating.
In general, when a thin film (layer) is formed by sputter deposition, the deposited material, in some cases, forms a less uniform thickness layer, which is less conformable to the underlayer, and forms a granular, rough surface. This behavior can be explained in terms of surface diffusion of the deposited material depending on the interaction between the thin film and the underlayer material, and the elevated temperature. Conventionally, aluminum or aluminum alloy is deposited relatively easily and uniformly on a barrier layer of TaN or TiN or the like by sputter deposition. However, sputtered and deposited copper atoms normally agglomerate on the barrier layer of TaN or TiN or the like during high temperature sputter deposition process to thus form a granular and discontinuous film, rarely producing a thin and uniform thickness deposition. If copper atoms agglomerate on a large scale to form nonuniform copper seed layer on the barrier layer, the plating current flowing through the seed layer becomes insufficient.
Further, if the seed layer has film defect, it is impossible to cause plating current to flow through such defective portion. A defective plated portion is liable to develop on an incomplete seed layer in the subsequent plating process. This holds true for electroless plating on a catalytic layer as an underlying layer, in place of the seed layer for the electroplating.
In order to solve the above problems, the substrate is cooled during sputter deposition at a low temperature to prevent an improper surface diffusion. However, because of temperature rise of the portion near the top surface of the substrate due to plasma irradiation or various uncertain factors at the plasma side, the substrate cooling might not necessarily work in present sputtering apparatuses.
It is therefore an object of the present invention to provide a method and apparatus for forming interconnect (wiring) which can fill a conductive material such as copper into a minute recess such as vias or trenches for forming interconnect provided on a surface of a substrate by film deposition by sputtering (sputter deposition) to thus obtain a satisfactory interconnect structure having no defect.
Another object of the present invention is to provide a method and apparatus for forming interconnect, and a target material which can suppress oblique traveling characteristic of sputtered atoms, cause the sputtered atoms to enter the deepest portion of a minute recess formed in the surface of the substrate, and coat or fill a conductive material into the interior of the minute recess without generating a defective portion or void.
Still another object of the present invention is to provide a method and apparatus for forming an underlying layer having a uniform thickness by suppressing generation of agglomeration on an interior surface of a minute recess, and forming satisfactory interconnect embedded in the recess and having no effect.
According to a first aspect of the present invention, there is provided a method for forming interconnect on a substrate by filling a conductive material in a fine recess formed in a surface of the substrate, the method comprising: providing a substrate and a target composed of a conductive material in confrontation with each other in a chamber; introducing a sputtering gas into the chamber while a high voltage is applied between the substrate and the target to cause the sputtering gas to collide with the target; and depositing particles of the conductive material emitted from the target on the surface of the substrate to form a thin film, while sputter-etching the thin film by reflection sputtering gas molecules reflected from the target and having high energy.
According to the present invention, neutral reflection sputtering gas molecules (reflection sputtering gas particles) are mixed with the conductive material particles emitted from the target and collide with the surface of the substrate to thus perform sputter etching of the conductive material layer deposited on the surface of the substrate, particularly, the conductive material deposited in a relatively thick state on the portion near the inlet of the fine recess (typically the overhang portion A in FIG. 10) preferentially. Therefore, the conductive material particles enter the interior and the depth of the recess and easily deposited therein.
In a preferred aspect of the present invention, a potential difference E(V) between the substrate and the target is set to a range which is expressed by the following equation (1);
30/Axe2x89xa6Exe2x89xa6500/Axe2x80x83xe2x80x83(1)
here, A=[(MSxe2x88x92MG)/(MS+MG)]2 
where MS represents atomic weight of the target, and MG represents atomic weight of the sputtering gas; and the distance L (mm) between the substrate and the target is set to a range which satisfies the following equations (2) and (3);
xcexxe2x89xa7Lxe2x80x83xe2x80x83(2)
50xe2x89xa6Lxe2x89xa6400 xe2x80x83xe2x80x83(3)
where xcex (mm) represents mean free path of the reflection sputtering gas molecules.
In the above aspect, the potential difference E between the substrate and the target is set to 30/A or more, and the sputtering gas such as argon gas which has been introduced into the chamber is ionized and accelerated by the electric field to form high-energy particles. Then, a part of the high-energy particles is neutralized and reflected from the surface of the target and becomes neutral reflection sputtering gas molecules having a sufficiently high energy for sputter etching. Further, the potential difference E between the substrate and the target is set to 500/A or less, thus preventing silicon semiconductor devices from being damaged.
Further, the distance L between the substrate and the target is set to the mean free path xcex or less, and hence the limited distance L mostly suppresses scattering caused by collision of the neutral reflection sputtering gas molecules with each other or resultant attenuation of kinetic energy. Thus, the sputter etching action of the neutral reflection sputtering gas molecules is prevented from being reduced.
Further, the distance L between the substrate and the target set to 400 mm or less prevents the conductive material particles which reach the substrate from being reduced. The distance L between the substrate and the target set to 50 mm or more avoids the damage to semiconductor devices caused by collision of the high energy conductive material particles or secondary electrons.
In a preferred aspect of the present invention, the sputtering gas comprises argon gas, and a pressure P (Pa) in the chamber is set to a range which satisfies Pxe2x89xa66.77/L.
In case of using argon gas having an ambient temperature (20xc2x0 C.) as a sputtering gas, the mean free path xcexof the argon gas including neutral reflection sputtering gas molecules (gas molecules) is expressed by xcex=6.77/P. Therefore, the distance L between the substrate and the target and the pressure P in the chamber are set so as to satisfy the requirement of Pxe2x89xa66.77/L, and hence the requirement of above equation (2) is satisfied.
In a preferred aspect of the present invention, the sputtering gas comprises argon gas, the target comprises copper, and the potential difference E between the substrate and the target is in the range of 0.6 to 10 kV.
In the case where argon gas is used as a sputtering gas and copper is used as a target, because the above value A becomes 0.05, the requirement of the above equation (1) can be satisfied by setting the potential difference E to the above range.
In a preferred aspect of the present invention, the substrate comprises a semiconductor substrate, and the target comprises copper, tantalum, titanium, tungsten, or alloy or compound containing at least one of these elements.
According to a second aspect of the present invention, there is provided an apparatus for forming interconnect on a substrate by filling a conductive material in a fine recess formed in a surface of the substrate, the apparatus comprising: a chamber for providing a substrate and a target composed of a conductive material in confrontation with each other therein; a power supply for applying a high voltage between the substrate and the target; and a gas introducing passage for introducing a sputtering gas into the chamber to cause the sputtering gas to collide with the target; wherein particles of the conductive material emitted from the target by collision of the sputtering gas are deposited on the surface of the substrate to form a thin film, while sputter-etching the thin film by reflection sputtering gas molecules reflected from the target and having high energy.
In a preferred aspect of the present invention, a potential difference E(V) between the substrate and the target is set to a range which is expressed by the following equation (1);
30/Axe2x89xa6Exe2x89xa6500/Axe2x80x83xe2x80x83(1)
here, A=[(MSxe2x88x92MG)/(MS+MG)]2 
where MS represents atomic weight of the target, and MG represents atomic weight of the sputtering gas; and the distance L (mm) between the substrate and the target is set to a range which satisfies the following equations (2) and (3);
xcexxe2x89xa7Lxe2x80x83xe2x80x83(2) 
50xe2x89xa6Lxe2x89xa6400 xe2x80x83xe2x80x83(3)
where xcex (mm) represents mean free path of the gas inside the chamber.
In a preferred aspect of the present invention, the sputtering gas comprises argon gas, and a pressure P (Pa) in the chamber is set to a range which satisfies Pxe2x89xa66.77/L.
In a preferred aspect of the present invention, the sputtering gas comprises argon gas, the target comprises copper, and the potential difference E between the substrate and the target is in the range of 0.6 to 10 kV.
According to a third aspect of the present invention, there is provided a method for forming interconnect on a substrate by filling a conductive material in a fine recess formed in a surface of the substrate, the method comprising: providing a substrate and a target composed of a conductive material having crystal grains whose diameter is not greater than 70 xcexcm in confrontation with each other in a chamber; introducing a sputtering gas into the chamber while a high voltage is applied between the substrate and the target to cause the sputtering gas to collide with the target; and depositing particles of the conductive material emitted from the target by collision of the sputtering gas on the surface of the substrate to form a thin film.
Because the target comprising a conductive material having crystal grains whose diameter is equal to or less than 70 xcexcm is used, the target contains many crystal grains having various crystal orientations, and the conductive material particles (sputtered atoms) can be emitted from the target toward various directions. Thus, the conductive material particles which travel in oblique directions collide with each other and the random traveling directions of the conductive material particles can be relaxed and averaged.
In a preferred aspect of the present invention, the voltage applied between the substrate and the target is equal to or more than 1000 V.
According to the present invention, a relatively high voltage is applied between the substrate and the target comprising a conductive material having crystal grains whose diameter is equal to or less than 70 xcexcm, the conductive material particles emitted from the target toward every direction interfere with each other and are averaged on the whole, and mainly the conductive material particles which travel in a vertical direction (direction perpendicular to the surface of the substrate) reach the substrate. Thus, coating or filling capability of the fine recess formed in the substrate is improved. Therefore, in the case where the applied voltage between the substrate and the target is equal to or higher than 1000 V, the effect of the target having small crystal grains is remarkable due to the intensified etching rate by the reflection sputtering gas molecules.
According to a fourth aspect of the present invention, there is provided a method for forming interconnect on a substrate by filling a conductive material in a fine recess formed in a surface of the substrate, the method comprising: providing a substrate and a target composed of a conductive material having crystal grains whose diameter is not greater than 60 xcexcm in confrontation with each other in a chamber; introducing a sputtering gas into the chamber while a high voltage is applied between the substrate and the target to cause the sputtering gas to collide with the target; and depositing particles of the conductive material emitted from the target by collision of the sputtering gas on the surface of the substrate to form a thin film.
According to the present invention, the number of crystal grains having various crystal orientations increases, and the conductive material particles (sputtered atoms) can be emitted from the target toward more various directions.
In a preferred aspect of the present invention, the voltage applied between the substrate and the target is equal to or more than 1000 V.
In the above aspect, a high voltage which is equal to or more than 1000 V is applied between the substrate and the target comprising crystal grains whose diameter is not more than 60 xcexcm. Thus, the above effect is further promoted.
According to a fifth aspect of the present invention, there is provided an apparatus for forming interconnect on a substrate by filling a conductive material in a fine recess formed in a surface of the substrate, the apparatus comprising: a chamber for providing a substrate and a target composed of a conductive material having crystal grains whose diameter is not greater than 70 xcexcm in confrontation with each other therein; a power supply for applying a high voltage between the substrate and the target; and a gas introducing passage for introducing a sputtering gas into the chamber to cause the sputtering gas to collide with the target; wherein particles of the conductive material emitted from the target by collision of the sputtering gas are deposited on the surface of the substrate to form a thin film.
In a preferred aspect of the present invention, the voltage applied between the substrate and the target is equal to or more than 1000 V.
According to a sixth aspect of the present invention, there is provided an apparatus for forming interconnect on a substrate by filling a conductive material in a fine recess formed in a surface of the substrate, the apparatus comprising: a chamber for providing a substrate and a target composed of a conductive material having crystal grains whose diameter is not greater than 60 xcexcm in confrontation with each other therein; a power supply for applying a high voltage between the substrate and the target; and a gas introducing passage for introducing a sputtering gas into the chamber to cause the sputtering gas to collide with the target; wherein particles of the conductive material emitted from the target by collision of the sputtering gas are deposited on the surface of the substrate to form a thin film.
In a preferred aspect of the present invention, the voltage applied between the substrate and the target is equal to or more than 1000 V.
According to a seventh aspect of the present invention, there is provided a target material for use in a target provided in an apparatus for forming interconnect on a substrate, the target emitting particles by causing a sputtering gas to collide with the target, the particles being deposited on the surface of the substrate to form a thin film, the target material comprising: a conductive material having crystal grains whose diameter is equal to or less than 70 xcexcm.
In a preferred aspect of the present invention, the conductive material comprises one of copper and copper alloys.
According to an eighth aspect of the present invention, there is provided a target material for use in a target provided in a apparatus for forming interconnect on a substrate, the target emitting particles by causing a sputtering gas to collide with the target, the particles being deposited on the surface of the substrate to form a thin film, the target material comprising: a conductive material having crystal grains whose diameter is equal to or less than 60 xcexcm.
In a preferred aspect of the present invention, the conductive material comprises one of copper and copper alloys.
According to a ninth aspect of the present invention, there is provided a method for forming interconnect on a substrate by filling a first conductive material in a fine recess formed in a surface of the substrate with plating, the method comprising: forming an underlying layer comprising a second conductive material having surface energy lower than that of the first conductive material on an interior surface of said recess; and plating the surface of the substrate with the first conductive material.
According to the present invention, when the underlying layer as a seed layer is formed by film deposition by sputtering, the seed layer is formed by a conductive material which is hard to be agglomerated or granulated by temperature rise, compared with the conductive material for forming the main conductor. As a result, the seed layer is prevented from being granulated, or the degree of granulation of the seed layer is reduced. Thus, in the subsequent plating process, improper plating or generation of plating defect can be prevented.
Since a material having large surface energy has a greater tendency to decrease its surface area so as to lower the sum total of surface energy in a system, such material tends to be agglomerated or granulated during the sputter deposition process.
In a preferred aspect of the present invention, the second conductive material comprises alloy containing at least one element constituting the first conductive material.
In a preferred aspect of the present invention, the first conductive material comprises copper, and the second conductive material comprises alloy containing copper.
According to the present invention, when copper interconnects are formed in place of aluminum interconnects, pure copper which has been generally used as a conductive material for forming an underlying layer is replaced with copper alloy having lower surface energy than pure copper. Therefore, the underlying layer having a uniform thickness and having no agglomeration and granulation is formed by sputter deposition, for example, and satisfactory interconnects comprising copper and having no defect can be formed.
In a preferred aspect of the present invention, the alloy containing the copper comprises copper-nickel alloy containing at least 5% nickel.
In the case where alloy is prepared by adding nickel to copper, as nickel content increases from zero to a certain percentage, surface energy decreases. At the same time, unlike pure copper, copper-nickel alloy containing at least 5% nickel can form an underlying layer having no granulation or agglomeration.
According to a tenth aspect of the present invention, there is provided an interconnect structure comprising: a fine recess formed in a surface of a substrate; interconnect comprising a conductive material filled in the fine recess; and an underlying layer formed on the recess and underlying the interconnect, the underlying layer comprising a conductive material having lower surface energy than the conductive material for forming the interconnect.